mirror of
https://github.com/Proxmark/proxmark3.git
synced 2024-11-21 04:50:14 -08:00
1f4789fe53
* fix 'hf 15 csetuid' * check for error codes, prevent client crash * some include file refactoring * some whitespace fixes * allow longer timeout for write commands * add function to send EOF only * modify 'hf list 15' to display "<EOF>" * add tracing of Reader commands * if REQ_OPTION is set on write commands, send separate EOF to request tag response * use #defines instead of hex constants * switch off field after UID update * return last tag response (if there is any) * iso15693: decode WRITE_MULTI_BLOCK in 'hf list 15'
397 lines
16 KiB
C
397 lines
16 KiB
C
#ifndef PROTOCOLS_H
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#define PROTOCOLS_H
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#include <stdint.h>
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//The following data is taken from http://www.proxmark.org/forum/viewtopic.php?pid=13501#p13501
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/*
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ISO14443A (usually NFC tags)
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26 (7bits) = REQA
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30 = Read (usage: 30+1byte block number+2bytes ISO14443A-CRC - answer: 16bytes)
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A2 = Write (usage: A2+1byte block number+4bytes data+2bytes ISO14443A-CRC - answer: 0A [ACK] or 00 [NAK])
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52 (7bits) = WUPA (usage: 52(7bits) - answer: 2bytes ATQA)
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93 20 = Anticollision (usage: 9320 - answer: 4bytes UID+1byte UID-bytes-xor)
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93 70 = Select (usage: 9370+5bytes 9320 answer - answer: 1byte SAK)
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95 20 = Anticollision of cascade level2
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95 70 = Select of cascade level2
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50 00 = Halt (usage: 5000+2bytes ISO14443A-CRC - no answer from card)
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Mifare
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60 = Authenticate with KeyA
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61 = Authenticate with KeyB
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40 (7bits) = Used to put Chinese Changeable UID cards in special mode (must be followed by 43 (8bits) - answer: 0A)
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C0 = Decrement
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C1 = Increment
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C2 = Restore
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B0 = Transfer
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Ultralight C
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A0 = Compatibility Write (to accomodate MIFARE commands)
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1A = Step1 Authenticate
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AF = Step2 Authenticate
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ISO14443B
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05 = REQB
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1D = ATTRIB
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50 = HALT
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SRIX4K (tag does not respond to 05)
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06 00 = INITIATE
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0E xx = SELECT ID (xx = Chip-ID)
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0B = Get UID
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08 yy = Read Block (yy = block number)
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09 yy dd dd dd dd = Write Block (yy = block number; dd dd dd dd = data to be written)
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0C = Reset to Inventory
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0F = Completion
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0A 11 22 33 44 55 66 = Authenticate (11 22 33 44 55 66 = data to authenticate)
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ISO15693
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MANDATORY COMMANDS (all ISO15693 tags must support those)
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01 = Inventory (usage: 260100+2bytes ISO15693-CRC - answer: 12bytes)
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02 = Stay Quiet
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OPTIONAL COMMANDS (not all tags support them)
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20 = Read Block (usage: 0220+1byte block number+2bytes ISO15693-CRC - answer: 4bytes)
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21 = Write Block (usage: 0221+1byte block number+4bytes data+2bytes ISO15693-CRC - answer: 4bytes)
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22 = Lock Block
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23 = Read Multiple Blocks (usage: 0223+1byte 1st block to read+1byte last block to read+2bytes ISO15693-CRC)
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25 = Select
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26 = Reset to Ready
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27 = Write AFI
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28 = Lock AFI
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29 = Write DSFID
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2A = Lock DSFID
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2B = Get_System_Info (usage: 022B+2bytes ISO15693-CRC - answer: 14 or more bytes)
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2C = Read Multiple Block Security Status (usage: 022C+1byte 1st block security to read+1byte last block security to read+2bytes ISO15693-CRC)
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EM Microelectronic CUSTOM COMMANDS
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A5 = Active EAS (followed by 1byte IC Manufacturer code+1byte EAS type)
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A7 = Write EAS ID (followed by 1byte IC Manufacturer code+2bytes EAS value)
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B8 = Get Protection Status for a specific block (followed by 1byte IC Manufacturer code+1byte block number+1byte of how many blocks after the previous is needed the info)
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E4 = Login (followed by 1byte IC Manufacturer code+4bytes password)
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NXP/Philips CUSTOM COMMANDS
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A0 = Inventory Read
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A1 = Fast Inventory Read
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A2 = Set EAS
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A3 = Reset EAS
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A4 = Lock EAS
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A5 = EAS Alarm
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A6 = Password Protect EAS
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A7 = Write EAS ID
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A8 = Read EPC
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B0 = Inventory Page Read
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B1 = Fast Inventory Page Read
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B2 = Get Random Number
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B3 = Set Password
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B4 = Write Password
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B5 = Lock Password
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B6 = Bit Password Protection
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B7 = Lock Page Protection Condition
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B8 = Get Multiple Block Protection Status
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B9 = Destroy SLI
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BA = Enable Privacy
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BB = 64bit Password Protection
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40 = Long Range CMD (Standard ISO/TR7003:1990)
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*/
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#define ICLASS_CMD_ACTALL 0x0A
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#define ICLASS_CMD_READ_OR_IDENTIFY 0x0C
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#define ICLASS_CMD_SELECT 0x81
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#define ICLASS_CMD_PAGESEL 0x84
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#define ICLASS_CMD_READCHECK_KD 0x88
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#define ICLASS_CMD_READCHECK_KC 0x18
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#define ICLASS_CMD_CHECK_KC 0x95
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#define ICLASS_CMD_CHECK_KD 0x05
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#define ICLASS_CMD_DETECT 0x0F
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#define ICLASS_CMD_HALT 0x00
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#define ICLASS_CMD_UPDATE 0x87
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#define ICLASS_CMD_ACT 0x8E
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#define ICLASS_CMD_READ4 0x06
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#define ISO14443A_CMD_REQA 0x26
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#define ISO14443A_CMD_WUPA 0x52
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#define ISO14443A_CMD_ANTICOLL_OR_SELECT 0x93
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#define ISO14443A_CMD_ANTICOLL_OR_SELECT_2 0x95
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#define ISO14443A_CMD_ANTICOLL_OR_SELECT_3 0x97
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#define ISO14443A_CMD_HALT 0x50
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#define ISO14443A_CMD_RATS 0xE0
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#define MIFARE_CMD_READBLOCK 0x30
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#define MIFARE_CMD_WRITEBLOCK 0xA0
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#define MIFARE_AUTH_KEYA 0x60
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#define MIFARE_AUTH_KEYB 0x61
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#define MIFARE_MAGICWUPC1 0x40
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#define MIFARE_MAGICWUPC2 0x43
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#define MIFARE_MAGICWIPEC 0x41
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#define MIFARE_CMD_INC 0xC0
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#define MIFARE_CMD_DEC 0xC1
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#define MIFARE_CMD_RESTORE 0xC2
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#define MIFARE_CMD_TRANSFER 0xB0
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#define MIFARE_EV1_PERSONAL_UID 0x40
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#define MIFARE_EV1_UIDF0 0x00
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#define MIFARE_EV1_UIDF1 0x40
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#define MIFARE_EV1_UIDF2 0x20
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#define MIFARE_EV1_UIDF3 0x60
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#define MIFARE_EV1_SETMODE 0x43
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#define MIFARE_ULC_WRITE 0xA2
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#define MIFARE_ULC_COMP_WRITE MIFARE_CMD_WRITEBLOCK
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#define MIFARE_ULC_AUTH_1 0x1A
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#define MIFARE_ULC_AUTH_2 0xAF
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#define MIFARE_ULEV1_AUTH 0x1B
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#define MIFARE_ULEV1_VERSION 0x60
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#define MIFARE_ULEV1_FASTREAD 0x3A
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#define MIFARE_ULEV1_WRITE 0xA2
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#define MIFARE_ULEV1_COMP_WRITE MIFARE_CMD_WRITEBLOCK
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#define MIFARE_ULEV1_READ_CNT 0x39
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#define MIFARE_ULEV1_INCR_CNT 0xA5
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#define MIFARE_ULEV1_READSIG 0x3C
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#define MIFARE_ULEV1_CHECKTEAR 0x3E
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#define MIFARE_ULEV1_VCSL 0x4B
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// mifare 4bit card answers
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#define CARD_ACK 0x0A // 1010 - ACK
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#define CARD_NACK_NA 0x04 // 0100 - NACK, not allowed (command not allowed)
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#define CARD_NACK_TR 0x05 // 0101 - NACK, transmission error
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/**
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06 00 = INITIATE
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0E xx = SELECT ID (xx = Chip-ID)
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0B = Get UID
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08 yy = Read Block (yy = block number)
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09 yy dd dd dd dd = Write Block (yy = block number; dd dd dd dd = data to be written)
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0C = Reset to Inventory
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0F = Completion
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0A 11 22 33 44 55 66 = Authenticate (11 22 33 44 55 66 = data to authenticate)
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**/
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#define ISO14443B_REQB 0x05
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#define ISO14443B_ATTRIB 0x1D
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#define ISO14443B_HALT 0x50
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#define ISO14443B_INITIATE 0x06
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#define ISO14443B_SELECT 0x0E
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#define ISO14443B_GET_UID 0x0B
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#define ISO14443B_READ_BLK 0x08
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#define ISO14443B_WRITE_BLK 0x09
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#define ISO14443B_RESET 0x0C
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#define ISO14443B_COMPLETION 0x0F
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#define ISO14443B_AUTHENTICATE 0x0A
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// ISO15693 COMMANDS
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#define ISO15693_INVENTORY 0x01
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#define ISO15693_STAYQUIET 0x02
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#define ISO15693_READBLOCK 0x20
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#define ISO15693_WRITEBLOCK 0x21
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#define ISO15693_LOCKBLOCK 0x22
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#define ISO15693_READ_MULTI_BLOCK 0x23
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#define ISO15693_WRITE_MULTI_BLOCK 0x24
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#define ISO15693_SELECT 0x25
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#define ISO15693_RESET_TO_READY 0x26
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#define ISO15693_WRITE_AFI 0x27
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#define ISO15693_LOCK_AFI 0x28
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#define ISO15693_WRITE_DSFID 0x29
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#define ISO15693_LOCK_DSFID 0x2A
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#define ISO15693_GET_SYSTEM_INFO 0x2B
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#define ISO15693_READ_MULTI_SECSTATUS 0x2C
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// ISO15693 REQUEST FLAGS
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#define ISO15693_REQ_SUBCARRIER_TWO (1<<0)
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#define ISO15693_REQ_DATARATE_HIGH (1<<1)
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#define ISO15693_REQ_INVENTORY (1<<2)
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#define ISO15693_REQ_PROTOCOL_EXT (1<<3) // RFU
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#define ISO15693_REQ_OPTION (1<<6) // Command specific option selector
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// when REQ_INVENTORY is not set
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#define ISO15693_REQ_SELECT (1<<4) // only selected cards response
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#define ISO15693_REQ_ADDRESS (1<<5) // this req contains an address
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// when REQ_INVENTORY is set
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#define ISO15693_REQINV_AFI (1<<4) // AFI Field is present
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#define ISO15693_REQINV_SLOT1 (1<<5) // 1 Slot (16 slots if not set)
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// ISO15693 RESPONSE FLAGS
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#define ISO15693_RES_ERROR (1<<0)
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#define ISO15693_RES_EXT (1<<3) // Protocol Extention
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// ISO15693 RESPONSE ERROR CODES
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#define ISO15693_NOERROR 0x00
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#define ISO15693_ERROR_CMD_NOT_SUP 0x01 // Command not supported
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#define ISO15693_ERROR_CMD_NOT_REC 0x02 // Command not recognized (eg. parameter error)
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#define ISO15693_ERROR_CMD_OPTION 0x03 // Command option not supported
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#define ISO15693_ERROR_GENERIC 0x0F // No additional Info about this error
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#define ISO15693_ERROR_BLOCK_UNAVAILABLE 0x10
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#define ISO15693_ERROR_BLOCK_LOCKED_ALREADY 0x11 // cannot lock again
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#define ISO15693_ERROR_BLOCK_LOCKED 0x12 // cannot be changed
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#define ISO15693_ERROR_BLOCK_WRITE 0x13 // Writing was unsuccessful
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#define ISO15693_ERROR_BLOCL_WRITELOCK 0x14 // Locking was unsuccessful
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// Topaz command set:
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#define TOPAZ_REQA 0x26 // Request
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#define TOPAZ_WUPA 0x52 // WakeUp
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#define TOPAZ_RID 0x78 // Read ID
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#define TOPAZ_RALL 0x00 // Read All (all bytes)
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#define TOPAZ_READ 0x01 // Read (a single byte)
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#define TOPAZ_WRITE_E 0x53 // Write-with-erase (a single byte)
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#define TOPAZ_WRITE_NE 0x1a // Write-no-erase (a single byte)
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// additional commands for Dynamic Memory Model
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#define TOPAZ_RSEG 0x10 // Read segment
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#define TOPAZ_READ8 0x02 // Read (eight bytes)
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#define TOPAZ_WRITE_E8 0x54 // Write-with-erase (eight bytes)
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#define TOPAZ_WRITE_NE8 0x1B // Write-no-erase (eight bytes)
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// HITAG1 commands
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#define HITAG1_SET_CCNEW 0xC2 // left 5 bits only
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#define HITAG1_READ_ID 0x00 // not a real command, consists of 5 bits length, <length> bits partial SN, 8 bits CRC
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#define HITAG1_SELECT 0x00 // left 5 bits only, followed by 32 bits SN and 8 bits CRC
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#define HITAG1_WRPPAGE 0x80 // left 4 bits only, followed by 8 bits page and 8 bits CRC
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#define HITAG1_WRPBLK 0x90 // left 4 bits only, followed by 8 bits block and 8 bits CRC
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#define HITAG1_WRCPAGE 0xA0 // left 4 bits only, followed by 8 bits page or key information and 8 bits CRC
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#define HITAG1_WRCBLK 0xB0 // left 4 bits only, followed by 8 bits block and 8 bits CRC
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#define HITAG1_RDPPAGE 0xC0 // left 4 bits only, followed by 8 bits page and 8 bits CRC
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#define HITAG1_RDPBLK 0xD0 // left 4 bits only, followed by 8 bits block and 8 bits CRC
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#define HITAG1_RDCPAGE 0xE0 // left 4 bits only, followed by 8 bits page and 8 bits CRC
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#define HITAG1_RDCBLK 0xF0 // left 4 bits only, followed by 8 bits block and 8 bits CRC
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#define HITAG1_HALT 0x70 // left 4 bits only, followed by 8 bits (dummy) page and 8 bits CRC
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// HITAG2 commands
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#define HITAG2_START_AUTH 0xC0 // left 5 bits only
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#define HITAG2_READ_PAGE 0xC0 // page number in bits 5 to 3, page number inverted in bit 0 and following 2 bits
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#define HITAG2_READ_PAGE_INVERTED 0x44 // page number in bits 5 to 3, page number inverted in bit 0 and following 2 bits
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#define HITAG2_WRITE_PAGE 0x82 // page number in bits 5 to 3, page number inverted in bit 0 and following 2 bits
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#define HITAG2_HALT 0x00 // left 5 bits only
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#define ISO_14443A 0
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#define ICLASS 1
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#define ISO_14443B 2
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#define TOPAZ 3
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#define PROTO_MIFARE 4
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#define ISO_7816_4 5
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#define ISO_15693 6
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#define ISO_14443_4 7
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//-- Picopass fuses
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#define FUSE_FPERS 0x80
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#define FUSE_CODING1 0x40
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#define FUSE_CODING0 0x20
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#define FUSE_CRYPT1 0x10
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#define FUSE_CRYPT0 0x08
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#define FUSE_FPROD1 0x04
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#define FUSE_FPROD0 0x02
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#define FUSE_RA 0x01
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// ISO 7816-4 Basic interindustry commands. For command APDU's.
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#define ISO7816_ERASE_BINARY 0x0E
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#define ISO7816_VERIFY 0x20
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#define ISO7816_MANAGE_CHANNEL 0x70
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#define ISO7816_EXTERNAL_AUTHENTICATE 0x82
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#define ISO7816_GET_CHALLENGE 0x84
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#define ISO7816_INTERNAL_AUTHENTICATE 0x88
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#define ISO7816_SELECT_FILE 0xA4
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#define ISO7816_GET_PROCESSING_OPTIONS 0xA8
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#define ISO7816_READ_BINARY 0xB0
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#define ISO7816_READ_RECORDS 0xB2
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#define ISO7816_GET_RESPONSE 0xC0
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#define ISO7816_ENVELOPE 0xC2
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#define ISO7816_GET_DATA 0xCA
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#define ISO7816_WRITE_BINARY 0xD0
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#define ISO7816_WRITE_RECORD 0xD2
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#define ISO7816_UPDATE_BINARY 0xD6
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#define ISO7816_PUT_DATA 0xDA
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#define ISO7816_UPDATE_DATA 0xDC
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#define ISO7816_APPEND_RECORD 0xE2
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// ISO7816-4 For response APDU's
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#define ISO7816_OK 0x9000
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// 6x xx = ERROR
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#define ISO7816_MAX_FRAME_SIZE 261
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/* T55x7 configuration register definitions */
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#define T55x7_POR_DELAY 0x00000001
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#define T55x7_ST_TERMINATOR 0x00000008
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#define T55x7_PWD 0x00000010
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#define T55x7_MAXBLOCK_SHIFT 5
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#define T55x7_AOR 0x00000200
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#define T55x7_PSKCF_RF_2 0
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#define T55x7_PSKCF_RF_4 0x00000400
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#define T55x7_PSKCF_RF_8 0x00000800
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#define T55x7_MODULATION_DIRECT 0
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#define T55x7_MODULATION_PSK1 0x00001000
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#define T55x7_MODULATION_PSK2 0x00002000
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#define T55x7_MODULATION_PSK3 0x00003000
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#define T55x7_MODULATION_FSK1 0x00004000
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#define T55x7_MODULATION_FSK2 0x00005000
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#define T55x7_MODULATION_FSK1a 0x00006000
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#define T55x7_MODULATION_FSK2a 0x00007000
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#define T55x7_MODULATION_MANCHESTER 0x00008000
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#define T55x7_MODULATION_BIPHASE 0x00010000
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#define T55x7_MODULATION_DIPHASE 0x00018000
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#define T55x7_X_MODE 0x00020000
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#define T55x7_BITRATE_RF_8 0
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#define T55x7_BITRATE_RF_16 0x00040000
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#define T55x7_BITRATE_RF_32 0x00080000
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#define T55x7_BITRATE_RF_40 0x000C0000
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#define T55x7_BITRATE_RF_50 0x00100000
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#define T55x7_BITRATE_RF_64 0x00140000
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#define T55x7_BITRATE_RF_100 0x00180000
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#define T55x7_BITRATE_RF_128 0x001C0000
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/* T5555 (Q5) configuration register definitions */
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#define T5555_ST_TERMINATOR 0x00000001
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#define T5555_MAXBLOCK_SHIFT 0x00000001
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#define T5555_MODULATION_MANCHESTER 0
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#define T5555_MODULATION_PSK1 0x00000010
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#define T5555_MODULATION_PSK2 0x00000020
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#define T5555_MODULATION_PSK3 0x00000030
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#define T5555_MODULATION_FSK1 0x00000040
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#define T5555_MODULATION_FSK2 0x00000050
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#define T5555_MODULATION_BIPHASE 0x00000060
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#define T5555_MODULATION_DIRECT 0x00000070
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#define T5555_INVERT_OUTPUT 0x00000080
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#define T5555_PSK_RF_2 0
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#define T5555_PSK_RF_4 0x00000100
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#define T5555_PSK_RF_8 0x00000200
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#define T5555_USE_PWD 0x00000400
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#define T5555_USE_AOR 0x00000800
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#define T5555_SET_BITRATE(x) (((x-2)/2)<<12)
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#define T5555_GET_BITRATE(x) ((((x >> 12) & 0x3F)*2)+2)
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#define T5555_BITRATE_SHIFT 12 //(RF=2n+2) ie 64=2*0x1F+2 or n = (RF-2)/2
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#define T5555_FAST_WRITE 0x00004000
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#define T5555_PAGE_SELECT 0x00008000
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#define T55XX_WRITE_TIMEOUT 1500
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uint32_t GetT55xxClockBit(uint32_t clock);
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// em4x05 & em4x69 chip configuration register definitions
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#define EM4x05_GET_BITRATE(x) (((x & 0x3F)*2)+2)
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#define EM4x05_SET_BITRATE(x) ((x-2)/2)
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#define EM4x05_MODULATION_NRZ 0x00000000
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#define EM4x05_MODULATION_MANCHESTER 0x00000040
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#define EM4x05_MODULATION_BIPHASE 0x00000080
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#define EM4x05_MODULATION_MILLER 0x000000C0 //not supported by all 4x05/4x69 chips
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#define EM4x05_MODULATION_PSK1 0x00000100 //not supported by all 4x05/4x69 chips
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#define EM4x05_MODULATION_PSK2 0x00000140 //not supported by all 4x05/4x69 chips
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#define EM4x05_MODULATION_PSK3 0x00000180 //not supported by all 4x05/4x69 chips
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#define EM4x05_MODULATION_FSK1 0x00000200 //not supported by all 4x05/4x69 chips
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#define EM4x05_MODULATION_FSK2 0x00000240 //not supported by all 4x05/4x69 chips
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#define EM4x05_PSK_RF_2 0
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#define EM4x05_PSK_RF_4 0x00000400
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#define EM4x05_PSK_RF_8 0x00000800
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#define EM4x05_MAXBLOCK_SHIFT 14
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#define EM4x05_FIRST_USER_BLOCK 5
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#define EM4x05_SET_NUM_BLOCKS(x) ((x+5-1)<<14) //# of blocks sent during default read mode
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#define EM4x05_GET_NUM_BLOCKS(x) (((x>>14) & 0xF)-5+1)
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#define EM4x05_READ_LOGIN_REQ 1<<18
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#define EM4x05_READ_HK_LOGIN_REQ 1<<19
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#define EM4x05_WRITE_LOGIN_REQ 1<<20
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#define EM4x05_WRITE_HK_LOGIN_REQ 1<<21
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#define EM4x05_READ_AFTER_WRITE 1<<22
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#define EM4x05_DISABLE_ALLOWED 1<<23
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#define EM4x05_READER_TALK_FIRST 1<<24
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#endif
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// PROTOCOLS_H
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