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0fa01ec7da
zlib tuning: prevent fpga_compress from generating fixed code blocks armsrc/Makefile: replace osimage with fullimage
68 lines
1.3 KiB
Plaintext
68 lines
1.3 KiB
Plaintext
/*
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-----------------------------------------------------------------------------
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This code is licensed to you under the terms of the GNU GPL, version 2 or,
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at your option, any later version. See the LICENSE.txt file for the text of
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the license.
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-----------------------------------------------------------------------------
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Linker script for the ARM binary
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-----------------------------------------------------------------------------
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*/
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INCLUDE ../common/ldscript.common
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PHDRS
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{
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text PT_LOAD FLAGS(5);
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data PT_LOAD;
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bss PT_LOAD;
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}
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ENTRY(Vector)
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SECTIONS
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{
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.start : {
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*(.startos)
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} >osimage :text
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.text : {
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KEEP(*(stage1_image))
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*(.text)
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*(.text.*)
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*(.eh_frame)
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*(.glue_7)
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*(.glue_7t)
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} >osimage :text
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.rodata : {
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*(.rodata)
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*(.rodata.*)
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*(fpga_all_bit.data)
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KEEP(*(.version_information))
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. = ALIGN(8);
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} >osimage :text
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.data : {
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KEEP(*(compressed_data))
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*(.data)
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*(.data.*)
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*(.ramfunc)
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. = ALIGN(4);
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} >ram AT>osimage :data
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__data_src_start__ = LOADADDR(.data);
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__data_start__ = ADDR(.data);
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__data_end__ = __data_start__ + SIZEOF(.data);
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__os_size__ = SIZEOF(.text) + SIZEOF(.data) + SIZEOF(.rodata);
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.bss : {
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__bss_start__ = .;
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*(.bss)
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*(.bss.*)
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. = ALIGN(4);
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__bss_end__ = .;
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} >ram AT>ram :bss
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.commonarea (NOLOAD) : {
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*(.commonarea)
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} >commonarea :NONE
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}
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