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RRG-Proxmark3/fpga
History
iceman1001 3f0f08ffbb updated fpga lf image for hitag
2020-02-22 13:34:52 +01:00
..
tests
plotedge script: warn for numpy, matplotlib
2020-02-21 16:10:18 +01:00
clk_divider.v
style of .v files
2019-07-30 22:51:38 +02:00
fpga_hf.bit
Add: 'hf plot' - implement function from offical repo (piwi)
2020-01-12 15:33:06 +01:00
fpga_hf.v
style
2020-01-12 17:30:29 +01:00
fpga_lf.bit
updated fpga lf image for hitag
2020-02-22 13:34:52 +01:00
fpga_lf.v
style
2020-01-12 17:30:29 +01:00
fpga.ucf
- improved reader sensitivity for 14443a cards (FPGA change!)
2013-11-19 18:52:40 +00:00
go.bat
THIS REQUIRES A BOOTROM UPDATE!! To save FPGA area, split the LF and HF bitstreams and load them on-demand.
2014-06-20 01:02:59 +02:00
hi_flite.v
style
2020-01-12 17:30:29 +01:00
hi_get_trace.v
Add: 'hf plot' - implement function from offical repo (piwi)
2020-01-12 15:33:06 +01:00
hi_iso14443a.v
style of .v files
2019-07-30 22:51:38 +02:00
hi_read_rx_xcorr.v
style of .v files
2019-07-30 22:51:38 +02:00
hi_read_tx.v
style of .v files
2019-07-30 22:51:38 +02:00
hi_simulate.v
typos
2019-08-06 13:51:10 +02:00
hi_sniffer.v
chg: reverting old @satsuoni felica changes.
2017-10-23 21:56:47 +02:00
lf_edge_detect.v
typos
2019-08-06 13:51:10 +02:00
lo_adc.v
assign direct
2020-01-28 22:06:40 +01:00
lo_edge_detect.v
style of .v files
2019-07-30 22:51:38 +02:00
lo_passthru.v
style of .v files
2019-07-30 22:51:38 +02:00
lo_read.v
typos
2019-08-06 13:51:10 +02:00
lo_simulate.v
style of .v files
2019-07-30 22:51:38 +02:00
lp20khz_1MSa_iir_filter.v
typos
2019-08-06 13:51:10 +02:00
Makefile
Add: 'hf plot' - implement function from offical repo (piwi)
2020-01-12 15:33:06 +01:00
min_max_tracker.v
chg: hitag refactoring (@anon)
2020-01-01 18:18:34 +01:00
sim.tcl
setting svn:eol-style=native on files, part 3
2010-02-22 19:29:05 +00:00
testbed_fpga.v
style of .v files
2019-07-30 22:51:38 +02:00
testbed_hi_read_tx.v
typos
2019-08-06 13:51:10 +02:00
testbed_hi_simulate.v
typos
2019-08-06 13:51:10 +02:00
testbed_lo_read.v
typos
2019-08-06 13:51:10 +02:00
testbed_lo_simulate.v
typos
2019-08-06 13:51:10 +02:00
util.v
setting svn:eol-style=native on files, part 3
2010-02-22 19:29:05 +00:00
xst_hf.scr
THIS REQUIRES A BOOTROM UPDATE!! To save FPGA area, split the LF and HF bitstreams and load them on-demand.
2014-06-20 01:02:59 +02:00
xst_lf.scr
THIS REQUIRES A BOOTROM UPDATE!! To save FPGA area, split the LF and HF bitstreams and load them on-demand.
2014-06-20 01:02:59 +02:00
xst_nfc.scr
ADD: FPGA missing file Thanks to @Satsuoni
2017-10-10 14:03:09 +02:00