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#7
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v4.13441
v4.14434
v4.14831
v4.15864
v4.16191
v4.16717
v4.17140
v4.17511
v4.17768
v4.18218
v4.18341
v4.18589
v4.18994
v4.19552
v4.9237
-
99e61f82c0
rework
iceman1001
2020-07-14 15:57:21 +02:00 -
804e2661f3
key file py script - @ikarus
iceman1001
2020-07-14 15:55:44 +02:00 -
49192ca4c4
add: new standalone mode. hf_iceclass
iceman1001
2020-07-14 15:47:47 +02:00 -
a95f4b3745
chg: check buttonpress
iceman1001
2020-07-14 15:46:32 +02:00 -
ce981d9124
fpga 14b merge p.N
iceman1001
2020-07-14 15:46:05 +02:00 -
d2a66cecba
style
iceman1001
2020-07-14 15:44:38 +02:00 -
4dabccf9db
style
iceman1001
2020-07-14 15:44:23 +02:00 -
bac126530c
prep for stand mode
iceman1001
2020-07-14 15:43:54 +02:00 -
889d1c93cb
fix: coverity mem leak
iceman1001
2020-07-14 15:25:56 +02:00 -
0f507c24e1
chg: readblock assuming better
iceman1001
2020-07-14 00:16:25 +02:00 -
4b14f21c77
fix iclass simulation
iceman1001
2020-07-13 23:27:16 +02:00 -
2fa9bd585f
style
iceman1001
2020-07-13 22:06:50 +02:00 -
dd7a3c208c
init arrays...
iceman1001
2020-07-13 22:06:15 +02:00 -
f00c0eb5cf
prep for timings
iceman1001
2020-07-13 22:05:38 +02:00 -
830ecd6e13
debugs
iceman1001
2020-07-13 22:05:11 +02:00 -
4493153dbb
verbose..
iceman1001
2020-07-13 20:58:24 +02:00 -
e476e7f504
coding style
iceman1001
2020-07-13 20:13:56 +02:00 -
b62c060727
chg: hf iclass rdbl, wrbl - got some love
iceman1001
2020-07-13 20:13:25 +02:00 -
88c14b9c08
iclass doesnt need 4500 timout anymore, can put earlier in hf search.
iceman1001
2020-07-13 18:20:43 +02:00 -
d6f65f8578
tosend into bigbuff
iceman1001
2020-07-13 18:14:34 +02:00 -
a6c240fe3b
tosend into bigbuff
iceman1001
2020-07-13 17:56:19 +02:00 -
3a39a9b64e
rev temporarily -fno-common as we can't have shorter BigBuf. Mem allocs will need to be sorted out.
Philippe Teuwen
2020-07-13 16:21:29 +02:00 -
b48d6ca14d
Merge branch 'master' into fpga
Philippe Teuwen
2020-07-13 15:43:11 +02:00 -
e19e01a6a6
make sure uninitialized vars doesnt end up on COMMON_section
iceman1001
2020-07-13 12:18:26 +02:00 -
ac29f16529
Revert "fix tracelog problem with making sure uninitialized vars dont get inside _COMMON_ section"
Philippe Teuwen
2020-07-13 15:41:39 +02:00 -
b18a9c017a
fix tracelog problem with making sure uninitialized vars dont get inside _COMMON_ section
iceman1001
2020-07-13 14:30:07 +02:00 -
aaa6f25ab6
chg: 'trace list' - now support relative times, us/fc (@piwi)
iceman1001
2020-07-13 13:55:19 +02:00 -
52e9d7a750
rework iclass dump
iceman1001
2020-07-13 12:29:31 +02:00 -
7aedd9c7fe
textual
iceman1001
2020-07-13 12:28:30 +02:00 -
a87ec6bd52
style
iceman1001
2020-07-13 12:28:01 +02:00 -
e7127514db
change debug
iceman1001
2020-07-13 12:26:26 +02:00 -
e055858fb8
clean up
iceman1001
2020-07-13 12:25:44 +02:00 -
713301226d
fgpa merge hell p.N
iceman1001
2020-07-13 12:21:42 +02:00 -
77aa5c6142
style
iceman1001
2020-07-13 12:20:35 +02:00 -
27c4d994ac
remove some debugstatments, use hdr.frame instead
iceman1001
2020-07-13 12:20:12 +02:00 -
1f8ab9c2fb
better logtext for debug, iclass dump -> NG
iceman1001
2020-07-13 12:19:06 +02:00 -
86538912a8
make sure uninitialized vars doesnt end up on COMMON_section
iceman1001
2020-07-13 12:18:26 +02:00 -
3eb5c83af5
Refactor HIDdeomdFSK
jumpycalm
2020-07-12 19:06:14 -04:00 -
2045a75bda
Minor format changes
jumpycalm
2020-07-12 08:33:54 -04:00 -
eeda3e9291
Refactor demodParadox()
jumpycalm
2020-07-11 23:44:53 -04:00 -
ebb7eb9f3e
fix coverity 294113
iceman1001
2020-07-11 20:53:07 +02:00 -
f866a847fb
fix coverity 294114
iceman1001
2020-07-11 20:46:37 +02:00 -
eb61524923
Merge branch 'master' into fpga
Philippe Teuwen
2020-07-11 15:25:20 +02:00 -
7106b48065
2020-07-11 09:47:41 +02:00 -
73e80793bd
2020-07-11 09:46:36 +02:00 -
23a5beb3c3
fix a bug in demodParadox()
jumpycalm
2020-07-10 23:22:52 -04:00 -
a25a5322dd
fpga: added iCLASS on deviceside
iceman1001
2020-07-10 16:37:56 +02:00 -
1feb34617b
hunting down why logtrace is missing
iceman1001
2020-07-09 19:43:00 +02:00 -
b627d91fc2
adapt
iceman1001
2020-07-09 19:42:34 +02:00 -
a0d23f586e
fpga
iceman1001
2020-07-09 19:42:04 +02:00 -
57d1ff9316
fpga
iceman1001
2020-07-09 19:41:57 +02:00 -
05299373fa
fpga
iceman1001
2020-07-09 19:41:52 +02:00 -
ed5471a895
fpga
iceman1001
2020-07-09 19:40:54 +02:00 -
1394ffc3a0
added new command "4x50_wipe"
tharexde
2020-07-09 02:00:09 +02:00 -
241e2b7c7e
added new command "4x50_wipe"
tharexde
2020-07-09 01:59:29 +02:00 -
8dd302907c
added new command "4x50_wipe"
tharexde
2020-07-09 01:59:09 +02:00 -
76d0ecf8cf
added new command "4x50_wipe"
tharexde
2020-07-09 01:59:01 +02:00 -
9d8c7a8de5
added new command "4x50_wipe"
tharexde
2020-07-09 01:58:50 +02:00 -
a659e7576d
added new command "4x50_wipe"
tharexde
2020-07-09 01:58:38 +02:00 -
59372cb5d4
added new command "4x50_wipe"
tharexde
2020-07-09 01:58:16 +02:00 -
d67bc94e20
hf iclass sniff
iceman1001
2020-07-09 00:21:26 +02:00 -
a76679f7e6
hf iclass reader
iceman1001
2020-07-09 00:20:52 +02:00 -
246144df2a
amiboo default pack
iceman1001
2020-07-08 23:11:50 +02:00 -
7ee811bb9e
felica fixes
iceman1001
2020-07-08 23:11:29 +02:00 -
ec1c72d73c
fix felica image
iceman1001
2020-07-08 23:11:11 +02:00 -
8934fd522d
fix #833 - missing some configblocks and spelling
iceman1001
2020-07-08 20:30:53 +02:00 -
f4b3dec0c8
remove verichip.
iceman1001
2020-07-08 18:09:34 +02:00 -
c56245d1aa
chg 'lf t55xx info' - detection of t55x7 configuration blocks
iceman1001
2020-07-08 18:04:51 +02:00 -
327af5764d
remove
iceman1001
2020-07-08 17:37:35 +02:00 -
2fcc9b07ef
disable verichip stuff. should be inside FDX already
iceman1001
2020-07-08 17:37:01 +02:00 -
3fdd4f343b
textual
iceman1001
2020-07-08 13:42:37 +02:00 -
584fe52153
lf t55 configblock detection updated
iceman1001
2020-07-08 13:41:38 +02:00 -
b6c7b38ce0
textual
iceman1001
2020-07-08 11:11:14 +02:00 -
aa0baa26c6
fix: missing define on some mingw
iceman1001
2020-07-08 11:09:20 +02:00 -
2a30f3b165
fgpa felica
iceman1001
2020-07-08 11:05:54 +02:00 -
0d4c537ede
version info for FeliCa fpga image
iceman1001
2020-07-08 11:05:04 +02:00 -
ce24e6acbb
fpga merge hell, all compiles
iceman1001
2020-07-08 09:45:49 +02:00 -
fef3a764ae
chg: hf mf decrypt - helptext (thanks @AdamLaurie)
iceman1001
2020-07-07 15:36:51 +02:00 -
b775b68e4e
fpga iclass
iceman1001
2020-07-07 13:18:53 +02:00 -
2502d4581b
iclass merges
iceman1001
2020-07-07 12:32:56 +02:00 -
7c15e4b7ff
fpga more iclass
iceman1001
2020-07-06 22:43:11 +02:00 -
6948ccff3a
fpga iclass...
iceman1001
2020-07-06 22:33:38 +02:00 -
d83a45f0cb
fpga merge changes
iceman1001
2020-07-06 15:16:00 +02:00 -
ab7c33ecbe
2020-07-06 14:33:13 +02:00 -
7811d0a085
textual
iceman1001
2020-07-06 05:48:50 +02:00 -
7e5b929749
updated ignore file
iceman1001
2020-07-06 05:46:46 +02:00 -
ae8be54fca
clean
iceman1001
2020-07-06 05:43:38 +02:00 -
927cd71ed9
use reflect fct
iceman1001
2020-07-06 05:43:12 +02:00 -
7d3cab1669
clean
iceman1001
2020-07-06 05:42:43 +02:00 -
791afef728
adapt reflect8 fct
iceman1001
2020-07-06 05:42:10 +02:00 -
9d204897d1
fix #830 - 'lf em 4x50_info/read' - now print msb and lsb again.
iceman1001
2020-07-06 05:41:44 +02:00 -
dfb6b8a69e
2020-07-05 11:33:30 +02:00 -
7d1a278197
merge hell p.x
iceman1001
2020-07-03 21:33:17 +02:00 -
2c0f595f86
no more snooping around
iceman1001
2020-07-03 14:59:10 +02:00 -
64068ba430
android adapt changed.
dxl
2020-07-03 16:46:40 +08:00 -
8189809f48
chg: adapt to fpga changes
iceman1001
2020-07-02 12:38:38 +02:00 -
80cda059b1
chg: adapt to fpga changes
iceman1001
2020-07-02 12:37:07 +02:00 -
fce4c1d13f
chg: adapt to fpga changes
iceman1001
2020-07-02 12:36:49 +02:00 -
837efdf5c4
chg: adapt to fpga changes
iceman1001
2020-07-02 12:36:24 +02:00 -
4043832c62
adapt to fpga changes. And bug hunting COTAG functionality that doesnt work
iceman1001
2020-07-02 12:35:54 +02:00